Nway Project Meeting (1/18/07)
From OSR
The first Nway LWK user's group meeting was held Jan. 1, 2007.
In attendance were:
Zaid Abudayyeh Trammell Hudson Kevin Pedretti
Topics Discussed
1) Code Organization
- Trammell already did a lot of reorg on the plane.
- rename sysdep directory arch
- add a drivers directory - ne2k, serial, vga, etc. live here
2) Talked start_kernel
- Probably want a default start_kernel linked with the kernel image but
allow users to load a new one as part of the load protocol
- start_kernel should allocate memory and then pull in the program
image(s) to execute.
- Eventually want the start_kernel's to cooperate and efficiently
fan-out program images.
3) Talked about locking
- Need SMP safe implementations (done)
- Want to rename to lock/unlock or spin_lock/spin_unlock
- Probably don't need a sleeping lock since there is only one task per
core.
4) Talked about usage models
- Need to support at least three models:
1) Virtual Node Mode - 1 address space per core
2) Threaded Mode - 1 address space per node
3) PGAS mode - 1 address space per core, all address
spaces mapped into high region of each address space.
5) Machine Room Tour
- Inspected nCube. Decided it would be our next target after x86_64.
Tasks with a first pass at assignments
1) Investigate why enabling external interrupts doesn't work (EFLAGS.IF). Once determined, update serial port code to take input and, for example, dump registers when the 'r' key is hit. (Zaid)
2) Implement a PCI infrastructure. Steal as much from BSD as possible. (Kevin)
3) NE2K driver. Get to the point of sending and receiving Ethernet frames (Kevin)
4) Implement SMP safe locks (Trammell, done)
5) Add memory validation to kernel. Currently, pointers passed from user space are trusted by the kernel. (Trammell, or perhaps Zaid).
6) Develop user space stuff. Implement the three usage models we talked about. (Trammell, initial cuts of VNM and THREADED done, PGAS needs 64-bit address space).
7) Consider moving kernel to high in the address space. Inspect and document what the physical and virtual memory map looks like. (Kevin)
8) Allow user to create special page table regions at different physical addresses.
9) Page fault handlers in user space
10) Signals and timers? Perhaps using the same infrastructure as the page fault handler (with a pre-defined stack).